Technical Field
The present disclosure relates to an electronic device having a memory protection unit which protects an access to a register of a device arranged in an address space, an operating system which operates in this electronic device and an access control system.
Related Art
In an electronic device such as a field device, a process operating on an operating system frequently performs an operation of a device having a register arranged in an address space. Here, an example of the process which operates a GPIO (General Purpose Input/Output) will be described. The GPIO indicates a general purpose IO and is a terminal which can arbitrarily operate an input and output by software.
FIG. 10 is a block diagram showing a structure example of main parts of an electronic device 400 including a microcontroller 410 and a device 420. As shown in FIG. 10, the microcontroller 410 includes a CPU CORE 411, a RAM 412, an MPU (Memory Protection Unit) 413 and a GPIO 414 which are mutually connected through a bus 415. To the bus 415, the device 420 is also connected. As the device 420, various devices may be used which meet uses of the electronic device 400 such as a storage device, a sensor, an input and output device or the like.
On the CPU CORE 411, an RTOS (Real-Time Operating System) operates and a plurality of processes are supposed to operate on the RTOS. The RTOS provides various services respectively to the processes via a process management or an API (Application Programming Interface).
The MPU 413 is a memory protection unit and performs a protection of an access to a register of the GPIO 414 or the like arranged in the address space. Specifically, when the RTOS sets an access right to the MPU 413 in accordance with a request from the process, the MPU 413 permits an access of the process which makes the request. On the other hand, for the process to which the access right is not allocated, the MPU 413 detects an illegal access and does not permit an access. Other unit having an access protecting function such as an MMU (Memory Management Unit) may be used in place of the MPU 413.
FIG. 11 is a diagram for explaining a procedure that the process operating on the RTOS 430 operates the GPIO 414 in the electronic device having the above-described structure. Here, a process a 440a and a process b 440b are supposed to operate on the RTOS 430 as independent programs.
Further, the GPIO 414 is supposed to be partitioned at intervals of prescribed bits such as 8 bits and treated as two groups of a GPIO_A 414a and a GPIO_B 414b. Here, the process a 440a is supposed to operate the GPIO_A 414a and the process b 440b is supposed to operate the GPIO_B 414b. Namely, the GPIO_A 414a is assigned as an exclusive device of the process a 440a and the GPIO_B 414b is assigned as an exclusive device of the process b 440b. 
The API prepared by the RTOS 430 includes an API-1 which is used to request for allocation of the access right to a GPIO register as a register for operating the GPIO 414. In order to operate the GPIO 414 by the process, the process needs to previously request the access right to be allocated by using the API-1. In accordance with the request, the API-1 operates the MPU 413 to set the access right thereto.
In an example shown in FIG. 11, the process a 440a requests the RTOS 430 to allocate the address space where a GPIO_A register is present to the process a 440a via the API-1 (S1).
When the access right to the GPIO_A register is not yet set, the API-1 of the RTOS 430 sets the access right for the process a 440a to the address space where the GPIO_A register is present (S2). FIG. 12 shows a state that the access right for the process a 440a is set to the address space where the GPIO_A register is present in the MPU 413.
Under this state, since the access right to the GPIO_A register is set for the process a 440a, the MPU 413 permits the process a 440a to access to the GPIO_A register. Accordingly, the process a 440a can access to the GPIO_A register to operate the GPIO_A 414a (S3).
The process b 440b can also operate the GPIO_B 414b in accordance with the same procedure. On the other hand, when the process a 440a accesses to a GPIO_B register, since the access right to the GPIO_B register is not set for the process a 440a, an access violation is detected by the MPU 413.
A setting of the access right to the address space and an access control by the MPU 413 can be performed not only to the GPIO registers, but also to various kinds of devices 420 with registers arranged in the address spaces.